Tuesday, August 30th
8:30-17:00DSD Tutorial Day (B006)
Wednesday, August 31st
9:30-10:00Opening Session (Auditório)
10:00-11:00Keynote speech I (Auditório)
Pekka Abrahamsson
Software Process Improvement Considered Obsolete: A Transition from Improvement-in-the-Large to Improvement-in-the-Small
11:00-11:30Coffee Break
11:30-12:30Keynote speech II (Auditório)
Melvin A. Breuer
Multi-media Applications and Imprecise Computation
14:00-15:00 S1 — SS2: Dependability and Testing of Digital Systems (B010)
Part 1
S2 — System Synthesis (B013)
Part 1. Power Driven System Synthesis
S3 — Circuits Synthesis (B011)
Part 1. Arithmetic
15:00-15:30Coffee Break
15:30-17:10 S4 — SS2: Dependability and Testing of Digital Systems (B010)
Part 2
S5 — System Synthesis (B013)
Part 2. Component Based System Synthesis
S6 — Circuits Synthesis (B011)
Part 2. Logic Synthesis
17:15-17:30 Poster Session
Thursday, September 1st
9:00-10:00Keynote speech III (Auditório)
Rob van Ommering
Components in Product Lines — The Next Steps
10:00-11:00Keynote speech IV (Auditório)
Bernard Candaele
SoC Design for Advanced Applications
11:00-11:30Coffee Break
11:30-12:30Keynote speech V (Auditório)
Dirk Timmermann
Wireless Sensor Systems — Constraints and Future Prospect
14:00-15:20 S7 — SS1: Wireless Sensor Systems (B010)
Part 1
S8 — Verification Techniques (B013)
Part 1
S9 — Application Specific Architectures (B011)
Part 1
15:30-16:00 Poster Session
15:30-16:00Coffee Break
16:00-17:30 S10 — SS1: Wireless Sensor Systems (B010)
Part 2
S11 — Verification Techniques (B013)
Part 2
S12 — Application Specific Architectures (B011)
Part 2
20:00Conference Dinner
Friday, September 2nd
9:00-10:30 S13 — System Synthesis (B010)
Part 3. High Level Language-based System Synthesis
S14 — Reconfigurable Systems (B013)
Part 1
S15 — Data Management in SoC (B011)
Part 1
10:30-11:00 Poster Session
10:30-11:00Coffee Break
11:00-12:00Keynote speech VI (Auditório)
François Terrier
UML and Components for System Modelling
12:00-13:00Keynote speech VII (Auditório)
Hannu Tenhunen
Networks on Chip
14:30-16:30 S16 — SS3: Remote Educational Tools for Design and Testing (B010)
Part 1
S17 — Circuits Synthesis (B013)
Part 3. Advanced Logic Synthesis
S18 — Performance Optimization: Architecture and Tools (B011)
Part 1
S19 — Work in Progress I (B012)
16:30-17:00Coffee Break
17:00-18:30       S20 — Work in Progress II (B012)